Latest Contribution from Prof. Mohamad Sawan's Research TeamCenter: Self-Adaptive Pseudo-Resistors for Millisecond Artifact Recovery and High Linearity in Neural Recording Front-eEnd Circuits

Closed-loop neuromodulation holds great promise for treating neurological disorders such as epilepsy and Parkinson’s disease. At its core, it relies on real-time neural sensing and adaptive electrical stimulation to achieve precise, intelligent therapeutic interventions.

However, a long-standing technical challenge remains. Electrical stimulation inevitably generates large transient artifacts at the recording front‑end, causing amplifier saturation and hiding critical neural biomarkers for tens to hundreds of milliseconds. During this blind window, the system loses its ability to accurately sense brain activity, compromising both treatment safety and effectiveness.

Conventional capacitively-coupled instrumentation amplifiers typically use fixed‑biased pseudo-resistors. Their extremely high resistance leads to a long RC time constant for discharging DC offset errors, making rapid recovery difficult.

Fig. 1. Conceptual diagram of a conventional capacitively coupled instrumentation amplifier (CCIA) front-end with a pseudo-resistor (PR) in the feedback loop.

Existing approaches to artifact mitigation, such as active reset, signal blanking, and digital subtraction—still suffer from drawbacks including data loss, increased system complexity, and high computational overhead.

Therefore, there is an urgent need for a hardware‑level fast‑recovery solution that is low‑power, area‑efficient, and free of data loss.

To address this bottleneck, Professor Mohamad Sawan’s research center proposes a Self-Adaptive Pseudo-Resistors. It requires no high‑frequency clock and causes no neural data loss. Under a large 1 V stimulus artifact, it achieves fast recovery within 3 ms, consuming only 2.3 μW and occupying just 0.015 mm² of silicon area. This compresses the blind window to an almost negligible level, offering a highly competitive and scalable solution for next‑generation high‑density closed‑loop neural interfaces.

Fig. 2. Operating principle of the A-PR, showing (a) the bias and floating power supply, (b) the PR core, and (c) the state transition from low-resistance recovery to high-resistance steady-state.

This research achievement has been published in IEEE Transactions on Biomedical Circuits and Systems (IEEE TBioCAS), a top journal in the field of circuits and systems. Ph.D. candidate Hui Wu is the first author of this paper. Chair Professor Mohamad Sawan and Research Professor Jie Yang are the co-corresponding authors. This work is supported by the Zhejiang Provincial 'Pioneer' and 'Leading Goose' R&D Program. Collaborative institutions include Hangzhou Dianzi University and the Westlake Institute for Optoelectronics. All parties complement each other’s advantages in circuit design, biomedical engineering, and experimental validation.

ABSTRACT

This paper solves the problem at its root by introducing a state-aware feedback element: a self-adaptive pseudo-resistor (A-PR). The A-PR architecture integrates two key innovations: an adaptive Floating Power Supply (FPS) that senses DC errors and autonomously collapses the feedback resistance for rapid recovery, and a process-insensitive Self-Biased Current Source (SBCS) that ensures robust, uniform performance against PVT variations. A complete neural recording front-end featuring the A-PR was fabricated in a 40-nm CMOS process. Measurement results validate the core claims, demonstrating a sub-3-ms recovery time from a 1-V artifact, an input-referred noise of 5.23 µVrms, and a tunable high-pass corner, all while consuming only 2.3 µW and occupying 0.015 mm2. By eliminating the trade-off between fast recovery and high fidelity, the A-PR provides a scalable, low-power solution for next-generation, high-resolution closed-loop neural interfaces.

Fig. 3. In-vivo validation showing (a) a human electrocardiogram (ECG) recording demonstrating rapid recovery from an injected 1 Vpp, 1 Hz (100 ms pulse width) differential artifact (saturation periods highlighted), and (b) a human electromyogram (EMG) signal recorded at rest.

Research Highlight

Pioneering Adaptive Sensing Hardware Architecture

A novel Adaptive Pseudo-Resistor (A-PR) architecture is proposed, which adopts an Adaptive Floating Power Supply (FPS) to track the voltage of feedback nodes in real time. It realizes fully automatic millisecond-scale artifact recovery without complex digital control logic or high-frequency clocks and completely avoids neural data loss caused by traditional blanking techniques.

Superior PVT Robustness and Channel Consistency

A process-insensitive and temperature-compensated Self-Biased Current Source (SBCS) is ingeniously integrated. The design counteracts temperature dependence and greatly mitigates process deviation effects, providing extremely stable picoampere-level bias current and ensuring high consistency of high-pass cutoff frequencies across multi-channel arrays.

Extreme Power-Area Efficiency and Comprehensive Performance

Fully verified through tape-out in a 40 nm CMOS process, the design achieves a 1 V large-signal artifact recovery time of < 3 ms with ultra-low power consumption of 2.3 µW and an ultra-compact area of 0.015 mm². Meanwhile, it maintains low input noise of 5.23 µVrms and good linearity, fundamentally breaking the traditional barrier between fast recovery and high fidelity and offering a highly competitive scalable solution for next-generation high-density closed-loop neural interfaces.

More Information

Wu H, Tan Z, Liu X, Chen J, Zou W, Hou Q, Lin S, Mao Y, Kuang X, Yang J, Sawan M. Self-Adaptive Pseudo-Resistors Enabling Millisecond-Level Artifact Recovery and High-Linearity for Neural Recording Front-Ends. IEEE Trans. Biomed. Circuits Syst. 2026 Apr; 20(2):194-205.

https://ieeexplore.ieee.org/document/11303122